Loongson officially releases the 3A5000 new-generation processor based on LoongArch
Recently, Loongson Technology Co., Ltd. officially released the LS3A5000 processor. With its significant leap in performance, this product is the first processor chip that features the LoongArch self-developed instruction system, setting the latest milestone for China's self-developed CPUs.
LoongArch takes on the experience accumulated over the 20 years of CPU development and ecological construction of Loongson. From the top-level microarchitecture to instruction functions and ABI standards, LoongArch is designed independently without authorization from any country. Thanks to the latest achievements from the evolution of modern instruction systems, LoongArch boasts a higher operational efficiency than ever. It fully considers the requirements of compatible ecology and integrates the main functional characteristics of international mainstream instruction systems such as x86 and ARM. With the technical accumulation and innovation of the Loongson team in binary translation for over ten years, LoongArch supports cross-instruction platform application compatibility.
According to the test results of domestic third-party testing institutions, the LS3A5000 processor gets more than 26 points on both SPEC CPU2006 fixed-point and floating-point operations of a single core in a GCC compiler environment and more than 80 points for all four cores. The UnixBench of the LS3A5000 desktop system based on a domestic operation system gets more than 1700 points for a single thread and 4200 points for all four threads.
LS3A5000 deeply integrates autonomy and security. All modules in LS3A5000, including CPU core, memory controller and related PHY, high-speed IO interface controller and related PHY, PLL, and on-chip multi-port register stack, are independently designed. LS3A5000 implements a special mechanism in the processor core to prevent "Spectre" and "Meltdown" attacks, and its processor core supports access control mechanisms such as operating system kernel stack protection.